View SG1526BJ-883B_9133059.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

regulating pulse width modulator block diagram ?? ? ? ? ? ? high re liability features ? ?? ? the sg1526b is a high-performance pulse width modulator for switching power supplies which offers improved functional and electrical characteristics over the industry- standard sg1526. a direct pin-for-pin replacement for the earlier device with all its features, it incorporates the following enhancements: a bandgap reference circuit for improved regulation and drift characteristics, improved undervoltage lockout, lower temperature coefficients on oscillator frequency and current-sense threshold, tighter tolerance on softstart time, much faster shutdown response, improved double-pulse supperession logic for higher speed operation, and an improved output driver design with low shoot-through current, and faster rise and fall times. this versatile device can be used to implement single-ended or push-pull switching regulators of either polarity, both transformerless and transformer-coupled. the sg1526b is specified for operation over the full military ambient temperature range of -55c to 150c. the sg2526b is characterized for the industrial range of -25c to 150c, and the sg3526b is designed for the commercial range of 0c to 125c. sg1526b/sg2526b/sg3526b december 2014 rev 1. 2 www.microsemi.com 1 ? 2014 microsemi corporation features description available to mil-std-883, ? 1.2.1 available to dscc - standard microcircuit drawing (smd) mil-m38510/12603bva - sg1526bj-jan radiation data availablemsc-ams level "s" processing available 8v to 35v operation 5v l ow drift 1% b andgap reference 1hz to 500k hz o scillator range dual 100ma source/sink digital current limiting double pulse suppression programmable deadtime improved u ndervoltage lockout single pulse metering programmable soft-start wide current l imit c ommon m ode range ttl/cmos compatible logic ports symmetry correction capability guaranteed 6 unit synchronization shoot-through currents less than 100ma improved shutdown delay improved rise and fall time ?? ? ? ? ? ? ? ? ? +v in metering f/f toggle f/f memory f/f r d r t c t ground oscillator reference regulator undervoltage lockout soft start reset c softstart compensation + error error + c.s. c.s. shutdown q q q q output b +v c output a +v in amp v ref to internal circuitry sync sr d s t q ? downloaded from: http:///
2 absolute maximum ratings (note 1) 40v40v -0.3v to 5.5v -0.3v to v in 200ma 50ma input voltage (v in ) ............................................................... collector supply voltage (v c ) ............................................. logic inputs .........................................................analog inputs .......................................................... source/sink load current (each output) ....................... reference load current .................................................. logic sink current ...........................................................operating junction temperature hermetic (j, l packages) .............................................plastic (n, dw packages) ............................................ storage temperature range ............................lead temperature (soldering, 10 seconds) ................... 15ma 150 c 150 c -65 c to 150 c 300 c note 1. exceeding these ratings could cause damage to the device. thermal data j package: thermal resistance- junction to case , jc .................. 25c/w thermal resistance- junction to ambient , ja .............. 70c/w n package: thermal resistance- junction to case , jc .................. 30c/w thermal resistance- junction to ambient , ja ............. 60c/w dw package: thermal resistance- junction to case , jc .................. 35c/w thermal resistance- junction to ambient , ja ............. 90c/w l package: thermal resistance- junction to case , jc ................... 35c/w thermal resistance- junction to ambient , ja ........... 120c/w note a. junction temperature calculation: t j = t a + (p d x ja ). note b. the above numbers for jc are maximums for the limiting thermal resistance of the package in a standard mount-ing configuration. the ja numbers are meant to be guidelines for the thermal performance of the device/pc-board system. all of the above assume no ambient airflow. recommended operating conditions (note 2) input voltage .............................................................collector supply voltage ........................................ sink/source load current (each output) ................ reference load current ........................................... oscillator frequency range .............................. oscillator timing resistor .................................. 8v to 35v 4.5v to 35v 0 to 100ma 0 to 20ma 1hz to 500 k hz 2 k to 150 k oscillator timing capacitor ............................... available deadtime range at 40 k hz ...................... operating junction temperature range: sg1526b .......................................................sg2526b ......................................................... sg3526b ............................................................ 470pf to 20 f 5% to 50% -55 c to 125 c -25 c to 85 c 0 c to 70 c note 2. range over which the device is functional. electrical characteristics (unless otherwise specified, these specifications apply over the operating ambient temperatures for sg1526b with -55 c t a 125 c, sg2526b with -25 c t a 85 c, sg3526b with 0 c t a 70 c, and v in = 15v. low duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to the ambient temperature.) reference section (note 3) t j = 25 c v in = 8 to 35v i l = 0 to 20ma over operating t j v ref = 0v output voltageline regulation load regulation temperature stability (note 9) total output voltage range (note 9) short circuit current sg3526b units undervoltage lockout section v ref = 3.8v v ref = 4.8v reset output voltagereset output voltage parameter test conditions 4.954.90 25 5.00 7 1015 5.00 50 sg1526b/2526b 2.4 0.24.8 0.4 min. typ. max. min. typ. max. 5.05 1020 50 5.10 125 4.904.85 25 5.00 1010 15 5.00 50 5.10 2025 50 5.15 125 v mvmv mv v ma 2.4 0.24.8 0.4 v v rohs peak package solder reflow temp. (40 sec. max. exp.)...... 260c (+0, -5) downloaded from: http:///
3 r s 50 mv a ns i source = 40 a i sink = 3.6ma v ih = 2.4v v il = 0.4v (note9) 2.4 2.4 4 0.2 -125-225 0.4 -200-360 200 4 0.2 -125-225 0.4 -200-360 200 vv a a ns minimum duty cyclemaximum duty cycle v compensation = 0.4v v compensation = 3.6v 45 49 0 45 49 0% % i source = 20ma i source = 100ma i sink = 20ma i sink = 100ma v c = 40v c l = 1000pf c l = 1000pf high output voltagelow output voltage collector leakage rise time fall time r s 2 k r l 10m v pin1 - v pin2 150mv, i source = 100 a v pin2 - v pin1 150mv, i sink = 100 a r s 2 k v in = 8v to 35v error amplifier section (note 5) input offset voltageinput bias current input offset current dc open loop gain high output voltage low output voltage common mode rejection supply voltage rejection oscillator section (note 4) t j = 25 c v in = 8 to 35v over operating t j r t = 150 k , c t = 20 f r t = 2 k , c t = 470pf v in = 35v v in = 8v r l = 2.0 k to v ref initial accuracyvoltage stability temperature stability (note 9) minimum frequency (note 9) maximum frequencysawtooth peak voltage sawtooth valley voltage sync pulse width sg3526b test conditions parameter units reset = 0.4vreset = 2.4v error clamp voltagec s charging current electrical characteristics (continued) soft-start section note 3. i l = 0ma note 4. f osc = 40 k hz (r t = 4.12 k 1%, c t = .01 f 1%, r d = 0 ) note 5. v cm = 0 to 5.2v note 6. v cm = 0 to 12v note 7. v c = 15v note 8. v in = 35v note 9. these parameters, although guaranteed over the recom- mended operating conditions, are not tested in production. standby current 0.3 2 150 0.4 0.15 5 -1000 100 0.4 8 1.0 10 1.03.5 1.1 2 sg1526b/2526b 0.4.150 min. typ. max. min. typ. max. 500 2.50.5 3 0.5 7 3.01.0 1.0 500 2.50.5 3 0.5 3 3.01.0 1.0 8 1.0 5 1.03.5 1.1 2 %% % hz k hz vv s 64 3.6 7066 2 -350 3572 4.20.2 9480 60 3.6 7066 2 -350 3572 4.20.2 9480 10 -2000 200 0.4 mv nana db vv dbdb pwm comparator section (note 4) digital ports (sync, shutdown, and reset) high output voltagelow output voltage high input current low input current shutdown delay to output current limit comparator section (note 6) sense voltageinput bias current delay to output (note 9) 120 -10 400 100 -3 80 110 -10 400 100 -3 90 output drivers (each output) (note 7) 50 0.1 100 50 0.1 100 0.4.150 v a vv v v a s s 0.3 2 150 0.4 0.15 13.5 13 0.21.2 50 0.30.1 12.5 12 13.5 13 0.21.2 50 0.30.1 12.5 12 power consumption section (note 8) shutdown = 0.4v 18 30 18 30 ma downloaded from: http:///
4 figure 1.reference voltage vs. supply voltage figure 3.reference short circuit figure 2.reference temperature stability figure 6.error amplifier open loop gain vs. frequency figure 5.under voltage lockout figure 7.softstart time constant vs. c s figure 9.comparator input to driver output delay figure 8.current limit transfer function characteristic curves figure 4.reference ripple rejection 1k 10k 100k 1k 10k 100k downloaded from: http:///
5 figure 10.standby current vs. supply voltage figure 12.output driver deadtime vs. r d value figure 11.output driver deadtime vs. c t value figure 15.supply current vs. output frequency figure 14.supply current vs. output frequency figure 16.oscillator frequency temperature stability figure 18.shutdown input to driver output delay figure 17.output driver saturation voltage characteristic curves (continued) figure 13.supply current vs. output frequency r t = 2.7k f osc = 40 k hz khz (khz) (khz) r t = 2.2k - 155k r t = 2.2k - 155k r t = 2.2k - 155k f osc = 40 k hz r t = 4.12k r d = 0? c t = 0.01f downloaded from: http:///
6 figure 19.oscillator period vs. r t and c t application information characteristic curves (continued) voltage reference the reference regulator of the sg1526b is a band-gap type; that is, the precision +5 volt output is derived from the very predictable base-emitter voltage of an npn transistor. since this is a sub-surface phenomenon, the resulting output exhibits excellent stability compared to earlier surface-breakdown z ener designs. the reference output is stabilized at input voltages as low as +8 volts, and can provide up to 20ma of load current to external circuitry. an external pnp transistor can be used to boost the available current to many hundreds of ma. a rugged low-frequency audio- type transistor should be used, and lead lengths between the pwm and transistor should be as short as possible to minimize the risk of oscillation. undervoltage lockoutthe undervoltage lockout circuit protects the sg1526b and the power devices it controls from inadequate supply voltage. if +v in is too low, the circuit disables the output drivers and holds the reset pin low. this prevents spurious output pulses while the controlcircuitry is stabilizing, and holds the soft-start timing capacitor in a discharged state. the circuit consists of a merged bandgap reference and comparator circuit which is active when the reference voltage has risen to 2v be or 1.2 volts at 25 o c. when the reference voltage rises to approximately +4.4 volts, the circuit enables the output driversand releases the reset pin, allowing a normal softstart. the comparator has 200mv of hysteresis to minimize oscillation at the trip point. when +v in to the pwm is removed and the reference drops to +4.2 volts, the undervoltage circuit pulls reset low again.the soft-start capacitor is immediately discharged, and the pwm is ready for another soft-start cycle. the sg1526b can operate from a +5 volt supply regulated to within 4% by connecting the v ref pin to the +v in pin. figure 21.simplified undervoltage lockout the soft-start circuit protects the power transistors and rectifier diodes from high currentsurges during power supply turn-on. when supply voltage is first applied to the sg1526b, the undervoltage lockout circuit holds reset low with q3. q1 is turned on, which holds the soft-start capacitor voltage at zero. the second collector of q1 clamps the output of the error amplifier to ground, guaranteeing zero duty cycle at the driver outputs. when the supply voltage reaches normal operating range, reset will go high. q1 turns off, allowing the internal 100 a current source to charge c s . q2 clamps the error amplifier output to 1.0 v be above the voltage on c s . as the soft-start voltage ramps up to +5 volts, the duty cycle of the pwm linearly increases to whatever value the voltageregulation loop requires for an error null. figure 7 gives the timing relationship between c s ramp time to 100% duty cycle. figure 20.extending reference output current figure 22.soft-start circuit schematic soft-start circuit r t - (k ?) downloaded from: http:///
7 application information (continued) digital control ports the three digital control ports of the sg1526b are bi- directional. each pin can drive ttl and 5 volt cmos logic directly, up to a fan-out of 10 low-power schottky gates. each pin can also be directly driven by open-collector ttl, open-drain cmos, and open-collector voltage comparators, fan-in is equivalent to 1 low-power schottky gate. each port is normally high; the pin is pulled low to activate the particular function. driving sync low initiates a discharge cycle in the oscillator. pulling shutdown low immedi- ately inhibits all pwm output pulses. holding reset low discharges the soft-start capacitor. the logic threshold is +1.1 volts at +25 o c. noise immunity can be gained at the expense of fan-out with an external 2 k pull-up resistor to +5 v . oscillator the oscillator is programmed for frequency and dead time with three components: r t c t , and r d . two waveforms are generated: a sawtooth waveform at pin 10 for pulse width modulation, and a logic clock at pin 12. the following procedure is recommended for choosing timing values: 1. with r d = 0 (pin 11 shorted to ground) select values for r t and c t from figure 19 to give the desired oscillator period. remember that the frequency ateach driver output is half the oscillator frequency, and the frequency at the +v c terminal is the same as the oscillator frequency. 2. if more dead time is required, select a larger value of r d using figure 1 2 as a guide. at 40 k hz dead time increases by 300 ns/ . 3. increasing the dead time will cause the oscillator frequency to decrease slightly. go back and de-crease the value of r t slightly to bring the frequency back to the nominal design value. the sg1526b can be synchronized to an external logic clockby programming the oscillator to free-run at a frequency 10% slower than the sync frequency. a periodic low logic pulse approximately 0.5 sec wide at the sync pin will then lock the oscillator to the external frequency. multiple devices can be synchronized together by program- ming one master unit for the desired frequency, and then sharing its sawtooth and clock waveforms with the slave units. all c t terminals are connected to the c t pin of the master, and all sync terminals are likewise connected to the sync pin of the master. slave r t terminals should not be left open; at least 50 k should be connected from each pin to ground. slave r d terminals may be either left open or grounded. figure 24.oscillator connections and waveforms error amplifier the error amplifier is a transconductance design, with anoutput impedance of 2 megohms. since all voltage gain takes place at the output pin, the open-loop gain/frequency characteristics can be controlled with shunt reactance to ground. when compensated for unity-gain stability with 100 pf, the amplifier has an open-loop pole at 400 hz. the input connections to the error amplifier and determined by the polarity of the switching supply output voltage. for positive supplies, the common-mode voltage is +5.0 volts and the feedback connections in figure 25a are used. with negative supplies, the common-mode voltage is ground and the feedback divider is connected between the negative output and the +5.0 volt reference voltage, as shown in figure 25b. figure 25.error amplifier connections figure 23digital control port schematic (a) (b) 20k 40k tointernal logic downloaded from: http:///
8 application information (continued) output driversthe totem-pole output drivers of the sg1526b are designed to source and sink 100ma continuously and 200ma peak. loads can be driven either from the output pins 13 and 16, or from the +v c pin, as required. curves for the saturation voltage at these outputs as a function of load current arefound in figure 17. figure 26.push-pull configuration figure 28.driving n-channel power mosfets figure 27.single-ended configuration sg1526b lab test fixture 33k 10k 750? 2k 2k 1k 1k 665k 150k 4.12k 2k 1k 10k 10k - i b + i b downloaded from: http:///
9 connection diagrams & ordering information (see notes below) 10 12 3 4 5 6 7 8 9 1615 14 13 12 11 17 18 18-pin ceramic dipj - package ambient package part no. temperature range sg1526bj - 883b sg1526bj-jan sg1526bj - desc sg1526bj sg2526bj sg3526bj -55 c to 125 c -55 c to 125 c -55 c to 125 c -55 c to 125 c -25c to 85c 0 c to 70 c connection diagram shutdown compensation - error + error v collector output a groundc t r deadtime sync v ref +v in output b c softstart r t reset - current sense + current sense note 1. contact factory for jan and desc product availability. note 2. all parts are viewed from the top. note 3. hermetic packages j and l use pb37/sn63 hot solder lead finish, contact factory for availab ility of rohs versions. 1 1615 14 13 12 11 10 17 18 23 4 5 6 7 8 9 compensation -error +errorc softstart reset - current sense + current sense +v collector output a groundr deadtime sync v ref +v in output b c t shutdown r t 18-pin wide body plastic soic dw - package sg2526bdw -25 c to 85 c sg3526bdw 0 c to 70 c 20-pin ceramicleadless chip carrier l- package 45 6 7 8 321 9111213 10 14 15 16 17 18 20 19 sg1526bl - 883b -55 c to 125 c sg1526bl -55 c to 125 c 11. c t 12. r deadtime 13. sync14. output a 15. +v collector 16. n.c.17. ground 18. output b 19. +v in 20. v ref 1. n.c.2. +error 3. -error 4. comp 5. c softstart 6. reset7. - c.s. 8. + c.s. 9. shutdown 10. r t sg2526bn -25 c to 85 c sg3526bn 0 c to 70 c 18-pin plastic dipn - package n package: rohs compliant / pb-free transition dc: 0503n package: rohs / pb-free 100% matte tin lead finish dw package: rohs compliant / pb-free transition dc: 0516 dw package: rohs / pb-free 100% matte tin lead finish downloaded from: http:///
package outline dimensions controlling dimensions ar e i n inches , metric equivalents ar e show n for general information. note: dimensions do not include protrusions; these shallnot exceed 0.155mm ( 0 .006 ) on any side. lead dimension shall not include solder coverage. figure 29 j 18 -pin cerdip package dimensions 10 d im m illimeters i nches min max min max a - 24.38 - 0.960 b 5.59 7.11 0.220 0.280 c - 5.08 - 0.200 d 0.38 0.51 0.015 0.020 f 1.02 1.77 0.040 0.070 g 2.54 bsc 0.100 bsc h - 2.03 - 0.080 j 0.20 0.38 0.008 0.015 k 3.18 5.08 0.125 0.200 l 7.37 7.87 0.290 0.310 m - 15 - 15 1 m a b c k g 10 18 l d h f j seating plane 9 d e3 l l2 b1 e b3 a2 a1 a 1 3 8 13 18 h e dim millimeters inches min max min max d/e 8.64 9.14 0.340 0.360 e3 - 8.128 - 0.320 e 1.270 bsc 0.050 bsc b1 0.635 typ 0.025 typ l 1.02 1.52 0.040 0.060 a 1.626 2.286 0.064 0.090 h 1.016 typ 0.040 typ a1 1.372 1.68 0.054 0.066 a2 - 1.168 - 0.046 l2 1.91 2.41 0.075 0.95 b3 0.203r 0.008r note: all exposed metalized area shall be gold plated 60 -inc h minimum thickness over nickel plated unless otherwise specified in purchase order. figure 3 0 l 20 -pin ceramic lcc pack age dimensions downloaded from: http:///
11 package outline dimensions (continued) figure 31 dw 18-pin plastic wide-body soic (sowb) package dimensions h e a 2 a 1 c b l e d 1 9 10 18 s e a tin g pla n e a * lead coplanarity note: dimensions do not include mold flash or protrusions; these shall not exceed 0.155mm (0.006) on any side. lead dimension shall not include solder coverage. d im m illimeters i nches min max min max a 2.35 2.65 0.093 0.104 a1 0.10 0.30 0.004 0.012 a2 2.20 2.55 0.086 0.100 b 0.33 0.51 0.013 0.020 c 0.23 0.32 0.009 0.013 d 11.40 11.70 0.449 0.461 e 7.40 7.60 0.291 0.299 e 1.27 bsc 0.05 bsc h 10.00 10.65 0.394 0.419 l 0.40 1.27 0.016 0.050 0 8 0 8 lc* ?? 0.10 ?? 0.004 note: dimensions do not include mold flash or protrusions; these shall not exceed 0.155mm (0.006) on any side. lead dimension shall not include solder coverage. figure 3 2 n 18-pin plastic dual inline p ackage dimensions dim millimeters inches min max min max a 5.33 0.210 a1 0.38 0.015 a2 3.30 typ 0.130 typ b 0.36 0.56 0.014 0.022 b1 1.14 1.78 0.045 0.070 c 0.20 0.36 0.008 0.014 d 22.35 23.34 0.880 0.920 e 2.54 bsc 0.100 bsc e 7.62 8.26 0.300 0.325 e1 6.10 7.11 0.240 0.280 l 2.92 3.81 0.115 0.150 m - 15 - 15 a e1 d e b l e c m b1 s eating p lane 1 a2 a1 downloaded from: http:///
sg1526b .0 4 / 12.14 ? 2014 microsemi corporation. all rights reserved. microsemi and the microsemi logo are trademarks of microsemi corporation. all other trademarks and service marks are the prop erty of their respective owners . microsemi corporate headquarters one enterprise, aliso viejo ca 92656 usa within the usa: +1 (800) 713 - 4113 outside the usa: +1 (949) 380 - 6100 sales: +1 (949) 380 - 6136 fax: +1 (949) 215 - 4996 e- mail: sales.support@microsemi.com microsemi corporation (nasdaq: mscc) offers a comprehensive portfolio of semiconductor and system solutions for communications, defense and security, aerospace , and industrial markets. products include high - performance and radiation - hardened analog mixed - signal integrated circuits, fpgas, socs , and asics; power management products; timing and synchronization devices and precise time solutions, setting the world's standard for time; voice processing devices; rf solutions; di screte components; security technologies and scalable anti - tamper products; power - over - ethernet ics and midspans; as well as custom design capabilities and services. microsemi is head quartered in aliso viejo, calif. and has approximately 3,400 employees globally. learn more at www.microsemi.com . downloaded from: http:///

▲Up To Search▲

Price & Availability of SG1526BJ-883B

	To Download SG1526BJ-883B Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .